Research Catalog

Description and simulation of a fast packet switch architecture for communication satellites

Title
  1. Description and simulation of a fast packet switch architecture for communication satellites [microform] / Jorge A. Quintana and Paul J. Lizanich.
Published by
  1. [Washington, DC] : National Aeronautics and Space Administration ; [Springfield, Va. : National Technical Information Service, distributor, 1995]
Author
  1. Quintana, Jorge A.

Details

Additional authors
  1. Lizanich, Paul J.
  2. United States. National Aeronautics and Space Administration.
Description
  1. 1 v.
Series statement
  1. NASA technical memorandum ; 107104
Subject
  1. Architecture (Computers)
  2. Communication satellites
  3. Hardware description languages
  4. Multichannel communication
  5. Packet switching
  6. Satellite transmission
  7. Signal processing
  8. Simulation
Call number
  1. READEX Microfiche NAS 1.15:107104
Note
  1. Distributed to depository libraries in microfiche.
  2. Shipping list no.: 96-0493-M.
Reproduction (note)
  1. Microfiche.
Author
  1. Quintana, Jorge A.
Title
  1. Description and simulation of a fast packet switch architecture for communication satellites [microform] / Jorge A. Quintana and Paul J. Lizanich.
Imprint
  1. [Washington, DC] : National Aeronautics and Space Administration ; [Springfield, Va. : National Technical Information Service, distributor, 1995]
Series
  1. NASA technical memorandum ; 107104
Reproduction
  1. Microfiche. [Washington, D.C. : National Aeronautics and Space Administration, 1995] 1 microfiche.
Added author
  1. Lizanich, Paul J.
  2. United States. National Aeronautics and Space Administration.
Gpo item no.
  1. 0830-D (MF)
Sudoc no.
  1. NAS 1.15:107104
Research call number
  1. READEX Microfiche NAS 1.15:107104
View in legacy catalog